User is looking for more information regarding BCPM and the Global latching alarm status register
BCPM modbus register list
From BCPM register list, we find that register 224 refers to Global Latching Alarm Status
For he Bit 4 of this register, we have this information: Latching Alarm OFF state declared (1=OFF; ON state must have been achieved prior)"
What does it mean?
Refer to the attached diagram to see a sequence of alarms and the values for these bits.
- The sequence includes the Latching Alarm times, as they are an integral part of the latching alarms.
- The current has to go above the L-L Latching Alarm level for the On Time before the Latching alarms are armed.
- The bit 4 Latching Alarm Off state is an alarm that shows when the latching alarms have been disabled. Typically the delay would be set long enough on this alarm that it would only trip if something happened to the load so that it stopped running. (maybe for example because the breaker tripped)
- The Bit 0 and Bit 1 alarms would trigger as shown (although unless their associated delays were set to 0, there would be a delay between when the current passed the threshold and the alarm triggering).
- All latching alarms say tripped until cleared by the user, this includes the Bit 4 alarm.